Mainstream processors are becoming faster, RISCier, smaller, and less power hungry. They are also getting better at emulating non-native instruction sets.
Since the 1981 launch of the IBM PC, the whole personal computer industry has been in thrall to the Intel 80x86 architecture. The bonds loosened only slightly in 1984 by the emergence of a smaller, secondary standard around the Apple Macintosh's Motorola 680x0 CPUs. Now for the first time in over a decade, it looks like there's a real chance of the market opening up to new architectures. All in all, this is an exciting time in microprocessor development.
The effect of the Intel and Motorola standards has been good and bad, though mostly good. The good speaks for itself; the huge proliferation of DOS, Windows, and Macintosh software that we use every day came abo
ut only because there were stable platforms to attract application programmers. Standardization has allowed the PC industry to grow and keep computers affordable.
Standards Holdup
The down side is that the performance of mainstream CPUs has evolved more slowly than it might have, had it not been constrained to preserve backward compatibility with these industry standards. In particular, the two main players, Intel and Motorola, could not easily adopt those innovations that today we group under the name of RISC, because they required architectural changes (e.g., in the optimum size of register files) that were too drastic to preserve backward compatibility.
As a result, a new breed of RISC CPUs has grown up that outperform the mainstream chips; however, they have been excluded from mainstream PCs for lack of compatibility and, instead, have been confined to the much smaller technical workstation market. These chips include Sun's SPARC, DEC's Alpha, the Mips R4x00, and Hewlett-Packard's PA-RISC
. Also, because the workstation market is small in volume (although not in value), the production runs on these chips aren't big enough, thus making the chips too expensive to appeal to PC manufacturers.
Now this logjam is breaking for several reasons. Most important is the decision of IBM and Apple to shuck off their 80x86 and 680x0 standards in favor of the PowerPC for future products. This will shortly make the PowerPC 601 the best-selling RISC chip on the market, although its volume will still pale compared to 486 sales.
Also, emulation is at last becoming a practical way to achieve compatibility among different processors. Emulation has been around since Alan Turing and the first days of computing, but it has always been too costly in terms of performance to be commercially viable (remember the UCSD P-System?).
Now, machines like DEC's DECpc AXP/150 (using the DECchip 21064 RISC processor) or Silicon Graphics, Inc.'s Magnum (using a Mips R4400) can run Intel 80x86 applications at acc
eptable speeds in addition to achieving blinding performance on native RISC code. The Magnum, for example, supplies 80 percent of the graphics performance of a 486DX/33 in running the BYTE low-level Windows benchmarks; two-thirds of the memory performance and almost five times the file I/O performance--a reflection of the amazing capabilities of the Windows NT file system.
The cumulative performance index of the Magnum running the Windows 3.1 low-level benchmarks is 2.12 times the performance of the 486DX/33 machine (see "Is There a Better Windows 3.1 than Windows 3.1?," November 1993 BYTE). Although this figure is skewed by the file I/O numbers, it indicates that you can get 486 performance from a RISC platform running some form of software emulation.
IBM and Apple are relying on emulation as a medium-term bridge from old to new platforms--while few native PowerPC applications are available--although the precise route is at present shrouded behind a swirling confusion of acronymic software laye
rs like WABI, MAS, PowerOpen, SoftPC, and more.
Trends in operating-system design are helping make emulation feasible, too. Windows NT's HAL (hardware abstraction layer) and true microkernel architectures such as Mach greatly reduce the effort involved in porting a standard operating system to a new processor architecture, by concentrating all the hardware dependencies behind a small and well-defined software interface. Mac and Windows applications can spend anywhere between 60 percent and 90 percent of their time executing GUI-related system calls, so once these system routines are rewritten in native code only 10 percent to 40 percent of an application's code remains to be emulated.
The longer-term trend toward deeply object-oriented operating systems will insulate applications code even further from hardware. For example, Apple MessagePad applications written in Newtonscript are processor-independent, running on a software virtual machine.
This leads neatly to the third factor that's h
elping to erode the 80x86/680x0 dominance--namely, the newly created portable PDA (personal digital assistant) market sector. PDA applications, with their pen-based interfaces and notebook metaphors, look so completely different from desktop software that applications compatibility is not a big issue, only data portability. You won't want to run WordPerfect on a pocket organizer so long as you can transfer documents easily to and from your desktop machine. This freedom is allowing a whole new generation of tiny, low-power CPUs to struggle for supremacy (see "Intel/VLSI Join the PDA Fray" on page 101).
Of course, Intel is in no hurry to give up a decade of dominance during which it has made a great deal of money. Even though it is denied the advantages of starting from a clean sheet, Intel's smart engineers have been able to pick enough of the good stuff out of RISC to produce the Pentium, which has had a mixed reception from industry critics; it's faster than many people believed possible from the 80x8
6 architecture, but it is still some way behind the RISC leaders.
Clone Wars
While this talk of breaking logjams is all very exciting, it's as well to remember that right now (and for some time to come) the Intel 486 is the industry workhorse, only recently displacing the 386 as the entry-level processor for PCs. But even here Intel's dominance is no longer complete because a pack of clone 486 manufacturers--most notably, AMD and Cyrix--are snapping way above its ankles.
Both AMD and Cyrix have developed clones of the 486 that claim to be reverse-engineered without using any of Intel's proprietary microcode, although in AMD's case, Intel is still disputing this claim in court. The cloners use various stratagems to keep an edge over Intel. Cyrix focused on pin-compatible replacement chips that enable you to skip a generation, so the Cx486SLC, DLC, and DRx2 chips fit into 386 sockets but offer some 486 features and near-486 performance. On the other hand, AMD offers same-generation-but-faster p
arts; for example, 40-MHz (and soon 50-MHz) equivalents for the 486SX, where Intel has to stop at 33 MHz to protect sales of its 486DX. Recently, Cyrix has changed tack to confront Intel head-on at the top of the range. Cyrix's M1 chip aims to outdo Pentium in the "stealing RISC's clothes" game.
There has been much industry speculation about what architecture Pentium's successor, the P6, will adopt. One plausible suggestion is that it could adopt a hybrid architecture in which a "pure" RISC core emulates the older 80x86 instruction set in hardware, by translating 80x86 op codes into groups of native instructions--IBM is believed to be following this course for its future PowerPC designs. The advantage of such a "Trojan horse" strategy is that you could fully support current 80x86 applications, while a new generation of software that uses the RISC's faster native instructions is developed to wean users gradually onto a new architecture.
Another possible course is to make the Pentium architecture
itself RISCier, and the most obvious way to do that would be to remove the bottleneck caused by the small 80x86 register file. This is the way Cyrix plans to go with the M1, employing a file of 32 registers that can be dynamically renamed to emulate the 80x86's eight registers. This would allow up to four complete processor states to be stored at once, enabling an aggressive strategy of speculative branch execution (i.e., following both branch paths in parallel until it becomes clear which is the winner). Cyrix claims that this technique will keep the M1's pipelines full longer than the Pentium's, even though they are deeper seven-stage "superpipelines" (see "M1 Challenges Pentium" on page 83).
Intel is giving away little about its intentions just now. Frank Spindler, Pentium processor marketing manager, says, "We see no end in sight to what we can deliver with the Intel architecture, both within the Pentium generation and future generations of processors." In 1994, Intel will introduce a new version o
f the Pentium based on a 0.6-micron process technology, he adds, which will allow faster clock speeds. How much faster Intel won't say, but many in the industry expect it to be at least 100 MHz.
Cutting Costs
With the arrival of the Alpha and the PowerPC, you've probably seen all the major new RISC architectures for some time to come. A generic modern RISC chip uses 64-bit data paths; large on-chip instruction and data caches; and separate integer, floating-point and branch-processing units that allow the issue of three instructions at once (referred to as superscalar). The units are deeply pipelined with instruction execution broken up into four to eight stages and often have a feed-forward scheme to satisfy data dependencies between consecutive instructions within the pipeline.
Instead of inventing new architectures, RISC vendors, detecting the scent of change in the air, are scurrying to reduce the manufacturing price of their current products (see "RISC Grows Up" on page 91). Broadly spea
king, the cost of a chip in volume production is proportional to die size, so to make a chip less expensive, you use a newer fabrication process that allows smaller transistors, or you throw away some bits (e.g., from bus widths). Typical of this trend is the PowerPC 601, which is already cheaper than most 486DX variants thanks to an advanced 0.65-micron, four-layer metal process and a clever layout that reduces the space wasted by external interface pads.
Another effective approach is to attack overall system cost, rather than just CPU cost, by integrating more functions onto one chip so that fewer chips are needed to build a computer. A striking example of this is the DECchip 21066, which integrates a memory interface and PCI (Peripheral Component Interconnect) controller with an Alpha core.
Hot Chips
One question that's taxing all semiconductor manufacturers nowadays is how to reduce power consumption. Originally, it was the boom in laptop and notebook computers that made power into an iss
ue, because the 2- to 3-hour battery life that most machines could offer was barely acceptable. Intel developed the 486SL, featuring on-chip power management and 3.3-V operation, for the portable market.
Then in April 1993, the U.S. government raised the stakes by instructing government agencies to purchase only certified energy-efficient computers; Intel killed off the 486SL and announced that SL power-saving technology would be incorporated into all its future CPUs. The new PDA market has given a further boost to the low-power quest, as these tiny machines are expected to run for weeks on just two or three penlight cells.
Another pressing reason to seek lower power consumption exists: Today's fastest CPUs are getting so hot that it has become embarrassing. This fact was driven home the day I first opened an Alpha-based workstation to reveal a huge finned heat sink reminiscent of a racing motorcycle. These chips are dissipating up to 15 to 30 W, and further speed increases threaten to lead str
aight back to the age of water-cooled computers.
Steve Furber, original architect of the ARM processor family, says that as you shrink a chip design, the capacitance of the transistors decreases. But since you're switching them proportionally faster (by raising the clock frequency), the power that each transistor consumes remains the same. The transistors are now squeezed into a smaller area, so the power dissipated per square millimeter rises as the square of the process size. So, DEC's Alpha built in a 0.1-micron process--five to 10 years from now--would run at 2 GHz and dissipate around 3 kilowatts (excellent for making toast) if nothing else changed.
Clearly other features must change, and foremost among those is the supply voltage: Voltage and power are related by another square law, so going down from 5- to 2-V operation yields a sixfold power saving (25/4), while dropping to 0.5 V--which seems theoretically possible--would reduce power 100-fold. Furber sees a target somewhere between: "T
here's a very interesting breakpoint at about 0.9 V, which is where standard 1.5-V battery technology goes when it gets tired. If your logic only works at 1.5 V, you throw away a lot of battery life. I expect the people with real low-power motivation to find themselves aiming for 1 V sooner than they currently think they're going to."
To run the CPU at these lower voltages, everything in the system--memory, UARTs, video chips, and so on--has to come along, too. So the pursuit of single-cell operation for PDAs will eventually spawn a complete range of low-voltage parts, at which point there will be no reason for desktops not to follow suit.
Looking Ahead
You have more viable CPU choices available today than at any time since Intel introduced the first microprocessor back in 1971. Multiplatform operating systems, advanced emulation strategies, and new applications that don't require 80x86 compatibility have created a more open market for microprocessors than has existed since before the introd
uction of the IBM PC. Whether Alpha, R4x00, SPARC, or PowerPC can stay in the race with the 80x86, however, will depend on how well DEC, SGI, IBM, Sun, Apple, and the rest can package these technologies into solutions that meet customer needs as well or better than does an 80x86 processor.
Even if alternative architectures fail to capture more than 10 percent to 15 percent of the desktop market, they will provide price competition for Intel, and they will keep those 80x86 engineers busy pushing the envelope. In either case, the result will be better, more powerful desktop machines at reasonable prices.
Illustration: Running the BYTE low-level Windows benchmarks, an SGI Magnum 75SC (Mips R4400 processor) turns in a credible performance in emulation mode against an IBM PS/2 Model 90 XP 486 (486DX/33 processor). The cumulative index is skewed by the fantastic performance of the Windows NT file system.
Dick Pountain is a BYTE consulting editor. You can reach him on the In
ternet or BIX at
dickp@bix.com
.
Microprocessor Trends
