A new PDA chip set from Intel and VLSI brings the 80x86 architecture to PDAs
Paul Statt
No matter which way you slice it, CPUs designed for desktop computers don't work in small, hand-held devices. They are too big and power hungry, require too many support chips, and in some cases, are not powerful enough for tasks such as handwriting and, eventually, speech recognition. PDAs (personal digital assistants) need highly integrated designs that make the most of the chip real estate.
The first generation of such chips exists in devices such as the Apple Newton MessagePad (the ARM610) and the Eo Personal Communicator (the Hobbit 92010). Intel, which makes most of the CPUs found in the world's desktops, stayed on the sidelines as the first wave of PDAs hit the market. Howeve
r, with partner VLSI, long a maker of AT-class chip sets, Intel hopes to make up lost ground with its Polar chip set.
Computer on a Chip
Microprocessors are the heart of every personal computer, but only the heart. A PC--be it a notebook, desktop machine, or network server--requires numerous other chips to handle I/O, access SRAM (static RAM), DRAM, and VRAM (video RAM), and provide the glue logic that connects these subsystems to the CPU. In addition to the CPU, a typical desktop 486 system includes an AT-class chip set that controls memory access and interfaces with an ISA expansion bus; a secondary cache controller to buffer access to main memory; and a video controller, perhaps on a separate local bus.
The Polar chip set from VLSI and Intel provides these or comparable functions on two chips. To build a working machine, you need little more than a power supply and some DRAM. The Polar chip set is the basis of what Intel and VLSI call a mobile companion computer. Mobile companion is the In
tel/VLSI name for a PDA. It reflects the company's efforts to enable portable devices that are extensions of your desktop environment. You can expect machines based on the Polar architecture to be called mobile companion computers.
The IPC
At the core of the Polar chip set is the Integrated Processor Controller, or IPC. Designated VLSI part number VI86C300, it is a 32-bit processor architecture with support logic packaged in a 176-pin TQFP (thin quad flat package). Among the support functions it integrates are memory management, video control, and power management. The processor core of the new chip is a fully static Intel 32-bit CPU based on the Intel 386.
One of the key differences between the IPC and the 386 is that the former includes a cache controller with an integrated 2-KB cache and a tag RAM. This cache is unified, holding both instructions and data, and write-through. While the cache is too small to put the performance of the IPC on a par with 386 desktop systems that use external c
aches, it does provide a performance boost of cacheless 386 systems and helps reduce contention for main memory between the processor and the graphics subsystem. The IPC reduces this contention further by using a four-entry write buffer between the cache and DRAM.
One thing to note about the IPC is that DOS-based 386 programs cannot run on the new chip. Intel states, however, that the IPC's design should make it relatively easy for programmers familiar with the 80x86 architecture to write software for mobile companion computers.
In addition to the CPU core, the IPC handles both volatile and nonvolatile memory, the latter without discrimination. There are three types of nonvolatile memory: (1) flash memory, which can be likened to a RAM disk that stays on when the machine is turned off, (2) ROM, and (3) SRAM. All three types can be used interchangeably; an application never needs to know where it gets its bits from.
The large array, nonvolatile-memory interface is tuned for high-performanc
e XIP (execute-in-place) code, as well as for data storage. This means that you can turn off a PDA using the Polar chip set at any time and return to the same screen when you switch it back on. Separate programmability of each of four banks allows mixing of flash, ROM, and SRAM device types. Additional signals are provided for programming control and power management of advanced flash-memory devices that do not require power to maintain data in memory.
The page-mode DRAM controller supports different chip configurations--256 KB by 16 bits, 512 KB by 8 bits, 1 MB by 4 bits, 4 MB by 4 bits, 1 MB by 16 bits, and 2 MB by 8 bits--and both symmetric and asymmetrically addressed DRAMs. Because the DRAM on a mobile companion computer also doubles as storage for the video display, the IPC contains arbitration logic to handle contention between regular data access and video access. The IPC supports a 64-MB total memory space, which can be divided between DRAM, nonvolatile memory, and PCMCIA peripherals. DRAM is
limited to 16 MB of RAM, while nonvolatile memory and PCMCIA peripherals can take up the full 64 MB of memory space.
Video and Power Issues
To handle video output, the IPC integrates a 640- by 480-pixel LCD controller and an HGA (hardware graphics accelerator). The controller and accelerator work with the flat frame-buffer graphics subsystem to provide high-end performance for LCD-based systems. The LCD graphics are 4-bit gray scale--not black and white--for 16 levels of gray and a corresponding crisp appearance. The LCD controller also connects to the video digitizer found on the multiple peripheral controller, or MPC (the second chip of the Polar set), allowing it to display an inking plane above the output display planes. The inking plane displays strokes entered using a pen-input device.
While many PDAs use simple LCD video, the IPC goes one step further with its graphics acceleration hardware. By speeding the drawing of common graphics primitives into the frame buffer, the acceleration h
ardware gives mobile companions a crisp, quick video interface. The built-in BitBlt lets the IPC move rectangular arrays of bits quickly in the frame buffer. This facilitates opening, closing, and moving menus and windows in a GUI environment.
The IPC is designed with low-power operation in mind. It is fabricated with a 0.8-micron, three-layer-metal CMOS process and supports 3.3- and 5-V operation. The IPC uses a fully static core that can preserve the state of the CPU even when the system clock is shut down. The IPC can generate 20-, 25-, or 33-MHz system clocks.
The IPC also contains a power management controller that is enabled by a system management interrupt and accessible via software. In addition to the simple types of on/off power management provided by hardware-based solutions used in PCs, the IPC power management system can be controlled by the operating system, which can usually make better judgments about which subsystems should remain active and which can be powered down. The power
management system can shut down individual subsystems on the chip. Power dissipation is estimated at just over half a watt when operating at 3.3 V.
The MPC
As previously mentioned, in addition to the IPC, the Polar chip set contains the MPC (VLSI part number VI86C100), which is designed for standard I/O but incorporates several optimizations to better enable telecommunications. The MPC is the peripheral controller complement of the IPC. Packaged as a 100-pin TQFP, the MPC includes a serial-communications port for networking or printing, an infrared I/O port for a keyboard or remote access, and audio I/O for voice messaging, including voice storage and message forwarding. The MPC also uses analog I/O for system monitoring and control. A keyboard interface is optional, and a high-performance digitizer interface is standard.
The UART (universal asynchronous receiver/transmitter) part of the MPC is compatible with the VL16C550 standard and with its infrared I/O option, offers programmable I/O add
ress and programmable interrupt levels. The UART may be configured to operate through a normal serial connector or through a dedicated I/O pin that connects directly to an infrared LED. This HPSIR (Hewlett-Packard Serial Infrared) interface is compatible with those found on the HP 95LX, 100LX, and OmniBook Super Portable Computers.
The MPC's audio features let you store, forward, and play back recorded sounds. The chip itself has the power to work like a telephone, as well as like a fax machine or modem (with the appropriate PCMCIA cards). The ADC (A/D converter) allows for battery monitoring so that you won't waste your last amp recording a phone call. The MPC can operate at 3.3 V, 5 V, or in mixed mode, where the core logic operates at 3.3 V while individual functional blocks can operate at 5 V to provide a compatible interface to 5-V peripherals.
The IPC and MPC interconnect using VLSI's ML (multiplexed local) bus. This is a high-speed, 16-bit memory and I/O bus that is time-division multiple
xed on the standard Intel microprocessor bus. This increases performance while reducing the number of connecting pins required. The ML bus also offers general-purpose I/O ports that allow a wide variety of system configurations.
The first ML bus peripheral is the VLSI VL82C146 ExCA Local-Bus Controller, or ELC, which provides a completely buffered PCMCIA 2.0 interface for mobile companion systems. The interface supports full "hot insertion" capability, letting you insert or remove PCMCIA cards while your system is powered up. The ELC lets mobile companion system use many different makes of memory, storage, I/O, and communications cards. The ELC supports advance power management features including socket power control and 3.3- to 5-V suspend, which should allow the use of both high- and low-power expansion cards.
Outlook and Speculation
VLSI and Intel are working with Microsoft to ensure that the Polar chip set is easily integrated with the Microsoft At Work operating system for hand-held devi
ces. Microsoft At Work is a DOS-less variant of Windows designed specifically for PDA-type systems. The fact that it is a Windows variant will make it easier for developers familiar with the desktop version of Windows to produce software for mobile companion systems. One of the features of At Work that will directly support such systems is power management software that interfaces with the IPC's power management controller.
Abandoning DOS and DOS compatibility is a big step for Intel and VLSI to take with the Polar chip set. Both companies believe, however, that more important than DOS compatibility is data compatibility. No one is going to want to run a spreadsheet on a PDA, although you may want to massage data from a spreadsheet.
The Polar chip set is the first in a series of offerings from VLSI/Intel. In the works is a follow-on chip set based on an Intel 486 core. Such an offering may be a competitive necessity because other companies have already introduced second-generation versions of th
eir PDA processor offerings.
Advanced RISC Machines, for example, recently introduced the ARM7DM, its second-generation processor for the Apple Newton. The ARM7DM fixes two shortcomings of the ARM610 used in the current Newton MessagePads; it operates at 3.3 V as opposed to 5 V, and it uses a fully static design. Both characteristics are essential in PDA-class processors. Also, AT&T has recently introduced new versions of its Hobbit chips (see the text box "The AT&T Hobbit Enters Its Second Generation").
Another company with a recent PDA chip is AMD, which has preserved DOS compatibility with its Am386SC (see the text box "The Am386SC Does DOS and Windows" on page 104). Whether DOS proves to be a plus or a minus on such systems remains to be seen.
Speculating about the future of these new, highly integrated chips and devices is an irresistible temptation. Recall that the original microprocessor--the Intel 4004--was not designed with personal computers in mind; nobody had ever heard of suc
h things. The microprocessor, conceived as an inexpensive industrial controller, has managed to replace large expensive, centralized computers with something quite different. The small, fast, and inexpensive PDA chip sets may similarly evolve into something--or end up in a machine--unlike anything its creators ever imagined.
Illustration: Polar Power PDAs
The Polar chip set is a highly integrated solution that offers just about all the functionality you need in a PDA system.
Paul Statt is a freelance technology writer who has been covering the computer industry for 10 years. You can reach him on the Internet at
statt@aol.com
or on BIX c/o "editors."
Intel/VLSI Join The PDA Fray
