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ArticlesHow Bus Architecture Affects Graphics


February 1994 / BYTE Lab Product Report / How Bus Architecture Affects Graphics

The effect of the different buses on graphics performance is modest when using typical business applications. Our tests showed similar performance among boards for various bus architectures at 256- and 64,000-color resolutions. This changes, however, at 16-million-color resolutions, where the VL-Bus demonstrates at least a 25 percent improvement.

Applications usually draw an image directly into video memory. The amount of data that's required to pass through the bus at any given time for this operation is well within the bandwidth of the 16-bit ISA bus. However, some applications will draw an image outside of video memory as well and then transfer that image into video memory when necessary. This requires large blocks of data to pass through the bus, and the more advanc ed buses have an advantage over ISA.

ISA

Market forces made the original bus for the IBM PC a de facto standard. The performance of graphics adapters in an ISA bus is still acceptable, even compared to the more advanced bus technologies. However, in applications where extensive raw pixel copying from system memory to video memory is required, the ISA bus just can't keep up with VL-Bus or EISA.

Users with ISA systems that contain more than 12 MB of memory find that many of the new ISA graphics adapters either won't run or perform miserably. Since the video memory won't fit cleanly into the 16-MB limit, the board will fail or the driver has to perform acrobatics to access the memory.

EISA

ISA adapters can work in an EISA system; however, EISA-specific adapters can take advantage of the 32-bit address and data capabilities as well as the 33-MHz operating speed of that bus. Sharing interrupts and DMA channels, bus mastering, and other features make the EISA (and Micro Channel as well) su perior to the ISA bus in performance and abilities. Consequently, true 32-bit EISA graphics adapters will demonstrate marked performance gains over ISA in pixel copies from system to video memory.

VL-Bus

VESA designed its local-bus specification for the 32-bit Intel 486 processor. Consequently, a VL-Bus on a non-486-processor-based system cannot reside directly on the local bus. Instead, it uses a separate layer of hardware that converts the non-486 local bus to the VESA specification. This layered implementation is very similar to that of the PCI bus. The biggest limitation of the VL-Bus is loading. Adding peripherals to the bus causes signal degradation. The faster the bus, the fewer the number of peripherals that will operate reliably. In application, the VL-Bus will support up to three peripherals running at 33 MHz.

PCI

To avoid the processor dependency of the local bus, Intel developed the PCI (Peripheral Component Interconnect) specification, a bus design that interfaces to any loc al bus. It uses a hardware layer that isolates the PCI from the CPU local bus and operates at 33 MHz instead of the speed of the processor. The processor's independence also allows PCI adapters to operate in non-Intel-processor systems that have the PCI bus.

PCI provides specifications for 32- and 64-bit interfaces, which should meet performance demands through the end of the century. Another feature of the PCI specification is the self-configuration of installed products, which gives users the benefit of plug-and-play. Although PCI is still in its infancy (as demonstrated in our tests), a committee consisting of about 200 companies, including Apple, is clearly driving the PCI standard forward.


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