Archives
 
 
 
  Special
 
 
 
  About Us
 
 
 

Newsletter
Free E-mail Newsletter from BYTE.com

 
    
           
Visit the home page Browse the four-year online archive Download platform-neutral CPU/FPU benchmarks Find information for advertisers, authors, vendors, subscribers Request free information on products written about or advertised in BYTE Submit a press release, or scan recent announcements Talk with BYTE's staff and readers about products and technologies

ArticlesLow-Power Chip Technology


August 1994 / Features / Low-Power Chip Technology

Today, many conventional technologies and techniques are available to manufacturers looking for ways to reduce the power consumption of chips. The easiest solution is to simply lower the voltage gap. When a switch is opened, a wire with no charge is connected with a source at the basic voltage. The sudden surge of charge causes the wire to dissipate power as if it were a tiny heating element until it rises to the source voltage.

By lowering the general voltage level of a chip, you lower the voltage gap, which is the difference between the source voltage and ground. The power dissipated varies roughly as the square of the voltage gap, so dropping a chip's general voltage level from 5 V to 3 V can have a tremendous effect on the power that is lost. This is why 3.3 V is quickly becoming the new standard for the CMOS logic that is used in chi ps today.

Lowering the voltage level is not a simple process. The effectiveness of a transistor depends on a firm distinction between on and off. As the source of the voltage on the chip gets closer to ground, the electronics grow less stable. Random noise can easily confuse the logic. More important, the electronics take longer to settle into the correct on or off state. This means that designers must lower the chip speed to give the electronics time to give the correct answer.

It's possible for manufacturers to avoid these problems by using much greater precision in the chip fabrication process. If transistors are etched in the silicon with more precision, there will be less variation among transistors. In addition, manufacturers can tune the length of the lines between the transistors and be more careful while laying out the transistors so that they will all settle into the correct answer with better precision.

Manufacturers can also lower power consumption by slowing the clock used to drive the chip. This reduces the amount of power dissipated, because the switches are not switching as often. The savings incurred by this process are usually matched by an equal loss in processing power: Cutting the speed in half cuts the processing power in half. While this may reduce the need for refrigeration and special packaging with heat sinks, it does not change the overall power cost per operation.

One of the simplest techniques that is receiving widespread attention is simply turning off functional units on the chip whenever they are not needed. For example, floating-point processing power is important for graphics and some spreadsheets, but it isn't necessary for most of the fundamental tasks involved in running a computer.

The PowerPC 603 chip, for instance, can switch off the floating-point logic unit when only integer calculations appear. It can also turn off the data cache or the bus interface if it doesn't need them. The latest version of the Pentium also has the ability to shut off parts of itself.

In the near term, then, low-power chips will rely on two complementary strategies: lower voltage levels and active power management at the functional-unit or circuit level. In the longer term, new power-saving technologies will be needed to complement these strategies.


Illustration: Voltage and Power Given identical clocks, chips running at 3.3 V consume less than half the power of chips operating at 5 V.

Up to the Features section contentsGo to previous article: Silicon in ReverseGo to next article: Cache AdvantageSearchSend a comment on this articleSubscribe to BYTE or BYTE on CD-ROM  
Flexible C++
Matthew Wilson
My approach to software engineering is far more pragmatic than it is theoretical--and no language better exemplifies this than C++.

more...

BYTE Digest

BYTE Digest editors every month analyze and evaluate the best articles from Information Week, EE Times, Dr. Dobb's Journal, Network Computing, Sys Admin, and dozens of other CMP publications—bringing you critical news and information about wireless communication, computer security, software development, embedded systems, and more!

Find out more

BYTE.com Store

BYTE CD-ROM
NOW, on one CD-ROM, you can instantly access more than 8 years of BYTE.
 
The Best of BYTE Volume 1: Programming Languages
The Best of BYTE
Volume 1: Programming Languages
In this issue of Best of BYTE, we bring together some of the leading programming language designers and implementors...

Copyright © 2005 CMP Media LLC, Privacy Policy, Your California Privacy rights, Terms of Service
Site comments: webmaster@byte.com
SDMG Web Sites: BYTE.com, C/C++ Users Journal, Dr. Dobb's Journal, MSDN Magazine, New Architect, SD Expo, SD Magazine, Sys Admin, The Perl Journal, UnixReview.com, Windows Developer Network