Can AMD top the Pentium? Can SPARC catch fire? And can Intel remain king of the mountain? In the world of microprocessors, the excitement never ends.
Bob Ryan, Senior Editor
Every year, in mid-October, the best and the brightest in the world of microprocessor design converge on the San Francisco Airport Marriott for the Microprocessor Forum. In an event orchestrated by Michael Slater, editor/publisher of the Microprocessor Report, they reveal to the world and each other just what they've cooked up in the way of new microprocessors. Here you will find the chip that will power your system next year or the year after.
This year, the microprocessors announced at the forum make up a most interesting group. Collectively, they represent the current state of the art in microprocessors. Individually, they carry the hopes,
dreams, and fortunes of some of the biggest companies in the industry.
Knockin' on Intel's Door
For the past few years, AMD has enjoyed a fair measure of success in the x86 market. In the face of never-ending litigation with Intel over the terms of a technology-sharing agreement gone sour, the company has carved out a significant portion of the 486 market.
Despite its successes in the courtroom and in the marketplace, AMD has been beset by a serious problem: Because its designs are derived from Intel's, it has lagged at least a generation behind Intel in getting processors to market. It always plays catch up, never reaping the substantial financial benefits that accrue when you are the sole source of the fastest x86 processors.
The K5 is AMD's declaration of independence. The only thing it shares with Intel's processors is the x86 architecture. Thus, to a programmer--or to any software a programmer produces--the K5 is indistinguishable from a Pentium or a 486.
Where K5 differ
s is in its microarchitecture. It processes x86 instructions in a different way from a 486 or Pentium. It is the latest in a series of fifth-generation x86 processors--NexGen's Nx586 and Cyrix's M1 are the others--that operate differently from the Pentium, yet achieve the same results. In ``AMD vs. Superman,'' Tom Halfhill describes the technology of the K5 and discusses its implications in the marketplace.
New Beginnings
An early commercial pioneer of RISC technology, Sun Microsystems rode the performance advantage of its SPARC architecture to the top of the workstation world, leaving its competitors scrambling to catch up. Well, the scramble is over, and Sun is now in a tight spot.
On the high end, SPARC has been unable to compete with newer RISC architectures: DEC's Alpha, Hewlett-Packard's PA-RISC, and Mips Computer Systems' Mips--just about every architecture regularly surpasses the performance of SPARC. On the low end, where Sun has long enjoyed a price/performance advantage, PCs bas
ed on the Intel Pentium (and soon the K5, M1, and Nx586) often outperform SparcStations. What's a company to do?
Sun's solution is to regain the technology high ground that first propelled it to prominence. The visible manifestation of this solution is UltraSparc, a 64-bit SPARC implementation. In ``SPARC Strikes Back,'' Peter Wayner examines how UltraSparc stacks up against the competition.
Moving Forward
Another major announcement out of the Microprocessor Forum comes from Mips. Like Sun, Mips has not often been on the leading edge of performance, but this seems more by design than anything else. Recently, with its many partners, Mips has devoted much time and energy to derivatives such as the ultra-low-power R4200, the floating-point-intensive R8000/8010, and the low-cost R4600 Orion. In doing so, however, Mips has seen its mainline R4000 and R4400 processors slip further behind the leading edge.
The T5 changes all that and gives Mips a needed boost in performance. Tom Halfhill r
eports on the ins and outs of the T5 in ``T5: Brute Force.''
End of an Era?
Back in 1991, when Apple, IBM, and Motorola announced their intention to create a new processor architecture, and IBM and Motorola agreed to jointly design the first four implementations of that architecture, most observers were skeptical that they could pull it off. The PowerPC 620, the high-performance member of the PowerPC family, is the visible capstone of the PowerPC alliance. With the 620, IBM and Motorola have moved the PowerPC to 64 bits. Tom Thompson describes its workings in ``PowerPC 620 Soars.''
The 620 is the last processor that IBM and Motorola are committed to designing together. Whatever the future of the PowerPC architecture, the first four members of the line will always stand as landmarks of creative technical collaboration.
Offstage Lights
Among the companies without major CPU announcements at the forum was DEC, which jumped the gun by announcing the 21164, the world's fastest MPU (
microprocessor unit) last month.
HP and Intel are busy jointly developing a ``post-RISC'' architecture (reportedly based on Very Long Instruction Word technology--see this month's Core Technologies CPU column) that will run PA-RISC and x86 software. When they are ready sometime in 1997 or 1998 to announce the fruits of their labors, they will probably do it at the Microprocessor Forum.
The New CPUS
