Even though it's not in the British Museum's collection, emulation is RISC's Rosetta stone
Linley Gwennap
Software is like water for a computer: Even the best hardware can't thrive without it. Intel-compatible PCs are awash in applications software, more than the platform can really use. Most RISC machines, however, can only sip slowly from the software spring.
One of the most intriguing answers for expanding the RISC software base is IBM's secretive PowerPC 615 project. IBM only grudgingly admits the project even exists. Although technical details are unavailable, reliable sources tell us this hybrid chip will natively run both PowerPC and x86 code. It is scheduled to ship in the second half of 1996. But the 615 has encountered many delays due to the complexity involved, so its shipping date could slip
further. (See the sidebar "We Build a 615" for details on how a first-generation 615 might be built. Also see the sidebar "Alternate Views of the 615" for details on a Pentium-pin-out design.)
Several roadblocks stand in the way of completing the 615. IBM has designed its own Blue Lightning 486, but certain restrictions in the Intel license would force IBM to design a clean-room x86 core for the 615. To properly execute x86 code, the PowerPC's memory management unit (MMU) and caches must be modified to correctly handle x86 quirks, such as unaligned accesses, segmentation, and self-modifying code. Finally, the entire design must be tested and verified to properly execute two distinct instruction sets, a task that has never been achieved.
If IBM executes this strategy well, it will have a chip that outruns the fastest Pentium chips when executing native-PowerPC code, while delivering strong Pentium-class performance on x86 applications. The price premium to end users could be only $30 to $40 over th
e price of a traditional PowerPC system. Such a system could convince users of x86-based PCs to switch to the PowerPC because they could keep their old software and gradually ease over to new RISC applications.
Better Software Could Win Out
But not everyone is convinced that the 615 is the best approach. Software emulation is the most common tactic RISC vendors use for building a software base. The best example is the 68000 emulator that Power Macs use to execute software written for older Macs. The emulator examines each 68000 instruction, decodes it, and faithfully -- if considerably more slowly -- replicates the actions that would have occurred in a real 68000 CPU.
Another option is the two-headed beast Apple sells: a system that has 486 and PowerPC chips in the same box. The cost of including two processors, along with their associated memory and support chips, makes this an expensive option that's unappealing to PC buyers.
A third alternative is to improve the p
erformance of software emulation with hardware "assist" functions that speed up the emulator. For example, a new RISC instruction called decode x86 could quickly translate an x86 instruction into an integer offset; current emulators must extract fields and do table lookups to decode instructions. Another assist would implement in hardware the x86 condition flags, which are difficult to emulate.
These and other assist functions could be added to a standard RISC chip at little cost. Such changes could cut by half the number of RISC instructions needed to emulate a CISC instruction. Even this strategy, however, leaves the x86 programs running at no better than a third of the speed of native code, and even that performance achievement requires specially modified RISC chips.
A more promising approach is to convert the x86 code into RISC instructions using a technique called binary translation. A special program converts each x86 instruction into one or more RISC instructions, creating a new version of
the program that can execute natively on the RISC processor. Many x86 instructions can be replaced by a single RISC instruction, and most of the rest require only two or three. The translated program could run at 50 percent to 80 percent of the speed of a program that has been ported directly to the RISC platform.
The advantages of translation are good performance, no added hardware cost, and the ability to run on existing RISC chips. But the translation technology is tricky. No vendor has produced an x86-to-RISC translator that is reliable and delivers adequate performance. Digital Equipment has deployed a VAX-to-RISC translator for its Alpha processors and may be the closest to delivering a viable x86 translator.
If a vendor makes binary translation work, it could make obsolete hardware solutions such as the 615. In any case, watch for RISC PCs with fast x86 emulation coming to a store near you by the end of next year. These systems could begin to break the software stranglehold the x86 has on t
he PC industry.
Linley Gwennap is the editor of the
Microprocessor Report
, an industry newsletter from MicroDesign Resources (Sebastopol, CA). You can contact him on the Internet or BIX at
editors@bix.com
.
Why The 615 Matters
