Convex: Hypernode Power

When Hewlett-Packard moved to acquire Convex Computer in 1995, it may have looked like HP had acquired another supercomputer-shakeout casualty. But the merger evolved out of a tight alliance that started in 1992. Convex had plenty to offer HP: It had succeeded in fabricating high-speed gallium arsenide CPUs -- the same technology that had done in Cray Computer -- and put them in its proprietary C line of supercomputers.

The Exemplar line of supercomputers takes the commodity-parts route and uses HP's own PA-RISC 7200 processor, clocked at 120 MHz. The Exemplar SPP1200/CD, a compact model, starts with two processors and is expandable to a maximum of 16. The SPP1200/XA starts with ei ght proce ssors and expands to a maximum of 128. RAM configurations range from 128 MB to 32 GB. I/O support includes fast-and-wide SCSI-2 and FDDI.

The basic building block of the Exemplar is a hypernode that holds a maximum of eight processors. Each hypernode is essentially an SMP system where the processors and memory connect through a special four-by-five, high-speed, nonblocking crossbar bus. Gallium arsenide gate arrays implement the crossbar logic. When a processor accesses RAM, bus logic called an agent (see the figure "The Convex Hypernode" ) looks for an idle bus to memory and makes the connection. The fifth part of the crossbar is for I/O only.

Convex achieves scalable parallel processing by tying hypernodes together. Four one-way toroidal rings connect the hypernodes. Called Coherent Toroidal Interconnect (CTI) by Convex, it's based on the IEEE standard 1596-1992 Scalable Coherency Interface (SCI). The crossbar logic monitors memory accesses, and local (i.e., on-board) access remains on the hypernode. Remote (i.e., off-board) accesses get passed to the rings. Through CTI, the memories on all the hypernodes appear as one globally shared memory space (see the figure "Toroidal Interconnect" ).

Because the rings are actually cables, you can tie several Convex systems together to obtain more processing power. Furthermore, you still have one unified memory space, even though the RAM is physically located in different machines.

The Exemplar uses a multiprocessor verion of Unix called SPP-UX. SPP-UX is binary-compatible with HP-UX, so the Exemplar can draw on thousands of HP workstation applications.

A basic Exemplar 1200/CD 2 with two processors and 128 MB of RAM costs $128,320. A basic Exemplar 1200/XA 8 has eight processors and 256 MB of RAM and costs $349,500. Each four-processor upgrade will set you back $107,800.

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The Convex Hypernode

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A crossbar minimizes bus contention for RAM.

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Toroidal Interconnect

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The CTI organizes distributed memory into one shared space.