ent of the P55C until the first quarter of this year. Intel will also incorporate MMX in the Pentium Pro this year.
In theory, MMX could have a profound effect on computing. Preliminary tests suggest that s
ome multimedia and communications applications could run anywhere from 50 percent to 400 percent faster on an MMX platform, including 2-D/3-D graphics, MPEG, audio, and speech recognition.
Notebook versions of the P55C with MMX will come out during the first half of this year or later, reportedly in 150- and 166-MHz speed grades, sources say. In contrast, Intel will ship Klamath, the first single-chip version of the Pentium Pro, in volumes early this year -- three months ahead of schedule. With MMX, however, there appear to be some major barriers. "There are only a few business applications that take advantage of MMX," says Jerry Kao, technical marketing manager of the Mobile Computer division of Intel's Taiwan subsidiary.
"In the short term, MMX will boost power management and battery life, because the new instruction sets reduce the CPU work load. If the processor has more time to be in the ideal stage, the system can save more power -- up to 40 percent," Kao says.
Some independent software vend
ors (ISVs) are working on applications that benefit from MMX. Microsoft is talking about a plan to offer MMX technology in Direct3D API, a set of services for real-time, interactive 3-D graphics.
Structurally, the P55C with MMX is like any other superscalar processor. It has an integer pipeline and a floating-point pipeline, with a dedicated register file for each. Data for MMX instructions must be loaded from memory through the L2 external cache and then into the floating-point register. The real changes in MMX involve its highly parallel operations, done via a technique known as single instruction/multiple data (SIMD).
Designed to enable SIMD operations, the four new data types are packed bytes (8 bytes), packed words (four 16-bit quantities), packed double words (two 32-bit quantities), and quad words (64 bits). The new instruction sets fall into five categories -- arithmetic, logical, conversions, transfers, and MMX-specific tasks -- that operate on these data types using eight new MMX registers.
By operating on a packed-data type, the CPU can perform multiple operations all in one instruction.
The MMX instructions are similar to those in Sun's Visual Instruction Set (VIS) for the UltraSparc microprocessor unit (MPU). However, VIS has more to offer than MMX: 32 new registers, accelerated video decompression, more powerful addressing modes, pixel masking, and a highly specialized set of operations that greatly accelerates motion estimation when compressing MPEG video streams. Still, MMX has a good chance to pick up more ISVs. Last year, Intel licensed MMX to its rival AMD.
Enhanced Multimedia Performance
