nally, there is now good compatibility with standard PC hardware and softwar
e through the FX!32 translator or common peripherals and PCI cards.
Price Wars
To attract more vendors, Digital is concentrating on two fronts. In the low-cost arena, its new PCA series of processors will compete head-on with Intel in price while being almost twice as fast. The first PCA Alpha processor, the 21164PC (PCA-56), is a smaller version of the 21164 without the on-chip 96-KB secondary cache. However, the first-level instruction cache is doubled to 16 KB. Digital expects it to run at between 400 and 533 MHz, with 3.5 million transistors on a die size of only 138 mm
2
in 0.35-micron CMOS. The external 128-bit cache interface supports pipeline burst static RAM (PBSRAM) caches at speeds of 133 MHz and higher.
This year 21164 and 21164PC desktops will mainly be based on two new system chip sets, the 21174 Pyxis, from Digital, and Koala, from VLSI Technology. Both are compact single-chip core logic with a 128-bit-wide, 66-MHz memory bus using synch
ronous DRAM (SDRAM) and offering 1-GBps main-memory bandwidth. They also support elements of PC97 compliance, including soft-power on/off.
The slightly more expensive Pyxis offers 64-bit PCI, while the lower-priced Koala offers support for cheaper extended data out (EDO) RAM besides SDRAM. Many third-party Alpha systems will use standard ATX reference boards supplied by Digital (PC164LX, SX, and ZX) offering various 21164/21164PC and chip-set combinations. However, expect to see at least two key Taiwanese vendors offer Alpha mainboards based on some of these chip sets by the time you read this.
15.2 Million Transistors
On the high end, the 21264 (EV-6) processor, coming out in the fourth quarter of this year, has one of the most complex out-of-order execution architectures. Much higher system bandwidth is standard, while keeping the frequency high (between 500 and 667 MHz expected for the 0.35-micron part). This CPU has a whopping 15.2 million transistors on a 302-mm
2
die (the Pentium Pro is a similar size).
The 2 by 64-KB internal cache is helped by a separate 128-bit external cache bus operating at up to 333 MHz if dual-data synchronous SRAMs are used that transfer data on both edges of a clock cycle. There is a 64-bit memory connection, also running at up to 333 MHz. At this bus frequency, cache bandwidth reaches 5.2 GBps, and memory bandwidth reaches 2.6 GBps. Both buses operate in parallel.
The first line of 21264-based desktop/servers would be based on Digital's 21272 Tsunami chip set. This core logic offers single- and dual-CPU configurations with one or two 256-bit-wide 83-MHz SDRAM buses. This gives a maximum 2 by 2.6-GBps bandwidth (both CPUs have a separate point-to-point memory path with parallel access to main memory), as well as two parallel 64-bit PCI buses.
Digital Semiconductor will offer single-, dual-, and later quad-processor 21264 reference boards for system vendors. Given the very high bus frequencies and high-speed memories involve
d, whether other mainboard vendors will take up the challenge of designing 21264 system boards is questionable.
Topping 800 MHz
The 21264 supports special "count" instructions for supercomputing applications. In the second half of 1998, the 21264A (EV-67) using a 0.25-micron process is scheduled to appear, crossing the 800-MHz line. Then, the 21264 architecture will also be brought to the mainstream through the 21264PC (PCA-67) processor. The PCA-67 will cost less than the EV-67 because it is half the die size with half the cache and a simpler memory interface. These CPUs are designed for affordable single-processor and multiprocessor NT desktop/servers competing directly in price with the P68 Willamette Pentium Pro.
Digital will launch an even more powerful weapon in 1999 to keep the P7 Merced at bay. The 21364 (EV-7), probably coming out at a similar time as Merced, is expected to break the 1-GHz and 100-SPECint95 barriers.
Lost Opportunity
Besides Mic
rosoft's decision not to support the PowerPC on NT, the key issue in the PowerPC alliance at the moment is the competitive performance of its processors. Current PowerPC desktops and servers rely on the venerable 32-bit 603e and 604e processors running at up to 250 MHz. The 64-bit 620, the long-delayed performance leader of the first PowerPC generation, is nowhere to be seen, and IBM is mum about its 630 processor, supposed to be released this year.
For the PowerPC, the Mac OS and its successors are now the only game in town. Current Power Mac designs, while supporting dual-processor operation in high-end systems from Apple, Power Computing, and Umax, rely on slow 64-bit, 50-60-MHz memory buses that can easily be saturated by a single 200-250-MHz 604e, not to mention two of them. Also, having two parallel PCI buses with their own memory access further strains the already-narrow memory path.
The new series of PowerPC Platform (PPCP) mainboards and Power Macs to arrive this year are supposed to fix
these issues. Memory buses should shoot up to 100 MHz using SDRAM. There could finally be support for faster PCI buses as well (64-bit PCI or even a 66-MHz flavor). Multiprocessor support should be more efficient also, with separate caches for each CPU in anticipation of the new G3 PowerPC versions that will have separate backside cache buses like the Pentium Pro or Alpha 21264. This fits nicely with Apple's schedule for the Rhapsody OS, which should have better multiprocessor support.
In the long run, PowerPC systems designs will have a chance to further dramatically improve their performance when the first G4 processors come out toward the end of next year. These processors should bring even more speculative execution, 400-500-MHz clock rates, and a redesigned memory architecture. Let's hope that the G4 road map won't suffer the fate of the PowerPC 620 processor, which was supposed to take the 64-bit crown for the first PowerPC generation.
Alternatives to Intel CPUs
