Despite the onslaught of new, technically superior form factors, the venerable Baby AT is still alive and kicking. Literally every x86 mainboard design is available in a Baby AT version. But if you're integrating a new system, ATX, which offers all full-length slots and component positioning to provide better airflow, is the clear choice. Slim desktops are the only exception, due to their modular NLX form factor with riser card.
The ATX and full-size AT formats are both present in the workstation and server arenas, and the latter format is still popular in dual-processor designs. The key issues here are dual-processor (and sometimes quad-processor) support, airflow, the power requirements of the processors, and memory and I/O expandability.
CPU Choices
With the advent of new
x86 CPUs this year, it's easy to get confused by all the choices: Pentium "classic"; Pentium MMX, K6, or 6x86MX in standard Pentium mainboards with
socket 7
; Pentium Pro in mainboards with socket 8; and Pentium II in mainboards with slot 1. But what differences matter most to the user?
Currently all these sockets share the same bus bandwidth: 528 MBps on a 64-bit, 66-MHz system bus, a trait inherited from the first 66-MHz Pentium in 1993. The only exceptions are the Cyrix 6x86 and 6x86MX processors, some of which (e.g., the 6x86-150, 6x86MX-187.5, and 6x86MX-225) support a 75-MHz bus for 600-MBps bandwidth. Of course, the actual bandwidth over that bus has improved; the fast-page DRAM used in 1993 has been replaced by synchronous DRAM (SDRAM), which increases the bandwidth fourfold. In addition, new-generation processors, such as the Pentium II, provide separate secondary cache buses to off-load the main system bus.
Socket 7 supports only Pentium-class processors that use st
andard TTL signal levels, while socket 8 and slot 1 support Pentium Pro/Pentium II Gunning Transistor Logic (GTL) signal levels. GTL is supposedly more suited for higher-frequency system buses with more loads (i.e., those with several processors and/or multibank memory arrays).
Intel's move toward proprietary daughtercard modules in slot 1 and the future slot 2 is influenced--at least to a certain extent--by the company's desires to keep the competition from sharing the same socket design. It also lets Intel provide more cache-subsystem variations over a separate 64-bit cache bus on the module. For instance, a 512-KB half-speed cache (133 MHz on a 266-MHz CPU) is present in the first Pentium II slot 1 iteration, and up to 2 MB of the new full-speed dual-data-rate static RAM (DDR-SSRAM) cache might be present sometime next year in some Pentium II server versions using slot 2.
However, the actual technological life of each slot comes into question: The initial slot 1 running off a 66-MHz bus is expe
cted to support the Pentium II at up to 333 MHz, but 350- and 400-MHz Deschutes versions of the Pentium II will use a 100-MHz bus version of slot 1 in early 1998. Then the servers will probably use the 100-MHz slot 2, which has full-speed cache capability and support for four or even eight processors--yet another new footprint. Therefore, users of current slot 1 mainboards don't have much to hope for in terms of long-term upgrading.
On the other hand, AMD and Cyrix are trying to squeeze as much potential as possible from the standard Pentium socket 7 footprint. In fact, AMD's new K6 owes much of its initial popularity to the socket 7 footprint, which enables Pentium-class mainboards to match the Pentium Pro at least in uniprocessor performance.
Cyrix was the first company last year to drive socket 7 successfully to 75 MHz with its 150-MHz 6x68-P200+ processor. Its new M2 line will also support that bus frequency, as well as an 83-MHz bus. An 83-MHz, 64-bit memory bus could be a better choice than
75 MHz, as it can be easier to synchronize to 33-MHz, 32-bit PCI. The bandwidth of the memory bus in this case would be precisely five times that of the PCI.
While the first members of the K6 family (up to 266 MHz) use a standard 66-MHz bus, AMD seems poised to accelerate the socket 7 bus all the way to 100 MHz by year's end, and even 133 MHz next year, with a 250-/83-MHz interim stop this quarter. The first 0.25-micron iteration of the K6, running at 300 MHz, is expected to use a 100-MHz bus in socket 7. Such a move can help AMD to not only dramatically improve the external cache and memory performance of the K6, resolving the bottleneck that kept it from fully matching the Pentium II, but also extend the life of socket 7 for another year or so.
In any case, the current K6 and M2 processors already have 64 KB of on-chip full-speed primary cache, double the capacity of the cache on the Pentium II and Pentium MMX. Larger on-chip cache can somewhat buffer the effect of relying on a slower system bus
for both cache and memory transfers; this is the most serious limitation of socket 7.
Cache and Memory
In 1996, literally every new Pentium-class and higher PC had pipelined burst static RAM (PBSRAM) chips for secondary cache, which made the most out of the available bus speed. This year, two new SRAM types will appear in PC caches. The first is late-write burst SRAMs, which boost the frequency to about 250 MHz by supplying the write data to the memory one clock after address. These SRAMs are already supported by some RISC CPUs, such as the Mips R10000/R12000, UltraSparc, PA-8x00, and Alpha 21264.
You can add the dual-clock capability of transferring data on both clock edges to create the second new SRAM type, the aforementioned DDR-SSRAM. It offers data rates up to 400 MHz at 200-MHz clock speeds (envisioned for 4-Mb generation in early 1998) and up to 500 MHz (for 8-Mb generation in late 1998). Most new processors, including Intel's Katmai Pentium II and Digital Equipment's 21264 and P
CA57 low-power 21164, are expected to support DDR-SSRAM for added cache bandwidth.
The challenges that await mainboard designers at such cache-frequency levels are enormous, even when the CPU and cache are isolated on symmetric multiprocessing (SMP)-optimized modules, as is the case with Intel's Pentium II family and multiprocessor 21264 Alpha mainboards. It becomes almost necessary to move the full cache control onto the CPU via a dedicated backside cache bus, which is physically separate from the main memory bus. Ultrafast processors, such as the 21264 and R12000, which have 128-bit-wide cache buses at these frequencies, will be the testing ground for top mainboard designers' skills.
On the memory front, SDRAM has secured the leadership for 1997 and probably 1998, although its prospects beyond that look a bit insecure due to Intel's support for competing Direct RDRAM, initiated by Rambus. But the bandwidth-capacity limits of SDRAM have not yet been reached--currently you can obtain 125-MHz, 64-b
it, 128-Mb SDRAM dual in-line memory modules (DIMMs) composed of 64-Mb chips (5-1-1-1 burst transfers at 83 MHz). You can expect to see in 1998 256-Mb DDR-SDRAMs approaching 300-MHz throughput on a 150-MHz clock using both clock edges to transfer data, as RDRAM and DDR-SSRAM now do.
Current X86 mainboards using SDRAM do not have more than four DIMMs, and most of them do not support 72-bit error-correction-code (ECC) SDRAM DIMMs. But Alpha-based SDRAM boards, such as the Digital PC164LX and DeskStation RPX164 series, support parity or ECC SDRAM DIMMs. The new Intel 440LX chip set for the Pentium II is also expected to provide ECC SDRAM support.
I/O Bus Improvements
Now that ISA has been thrown out of the PC98 spec, it's clear that in a year's time, PCI will handle all your system's I/O except for graphics, which will probably use the new Accelerated Graphics Port (AGP) bus defined by Intel.
While its architecture is very similar to that of PCI, AGP's 32-bit bus differs; here it's a "
point-to-point" connection between the main memory and the graphics circuitry, enabling only one AGP slot to be present in a system. AGP-2x achieves 533 MBps by transferring data on both edges of a 66-MHz clock cycle. AGP-4x will deliver 1066 MBps by pushing the clock rate to 133 MHz. Many new graphics chip sets--from mainstream ATI and S3 offerings to high-end chips, such as 3DLabs' Glint Gamma--will directly support AGP, enabling them to access main memory for texture storage or to use the faster interface for better performance.
In addition to its current presence on the Alpha, some industry observers expect to see the 64-bit PCI bus extension implemented on the Intel platform. This extension doubles the I/O bandwidth to 264 MBps, enough for 200-MBps dual-port Fibre Channel cards. You can also pair two 64-bit PCI buses with separate paths to the main memory for a total I/O bandwidth of 528 MBps. This feature is provided in the Digital AlphaServer 4000. But other sources say that 64-bit PCI is not im
minent on x86 PCs, as there will be less need to speed up PCI after the graphics traffic is off-loaded onto AGP.
As mainboard designers have learned to handle PCI electrical load limitations, the past few months have seen the first batch of mainboards to offer five PCI slots on a single PCI bus--an improvement over the usual four. For even more slots, the mainboard needs to have either a PCI-to-PCI bridge, as the Digital 21153 does, or two parallel PCI buses.
PCI-to-PCI bridging is also a part of the first I20 Intelligent I/O implementations, which have already appeared on some Pentium Pro server mainboards, including the Tyan Talon 2. Intel's new 960RD processor--the successor to the first I20 processor, the 960RP--is implemented on several Pentium Pro mainboards; it has a dedicated secondary PCI bus with three or four slots that are I20 compliant.
PC97 Compliance
PC97 compliance, smart power management, and remote power management are must-have features for new mainboards in the s
econd half of this year. The trend is to embed more of these features in the chip set itself.
Toward year's end, the first mainboards compliant with the new PC98 specification should arrive, minus the set of old, huge ISA bus slots. While this ISA bus elimination may cause some temporary compatibility problems with some standards, such as Sound Blaster, it's something that's overdue. After all,the 16-year-old ISA standard does not stand up to the bandwidth demands of today, even for slower cards and peripherals.
Device Bay, developed by Compaq, Intel, and Microsoft, is also expected to be supported in 1998 mainboards. In addition, the IEEE 1394 "Firewire" interface becomes a requirement in PC98; it was just a recommendation for PC 97.
Graphics, I/O, and Multimedia Integration
Mainboards with some degree of integrated I/O will continue to be popular on both Intel and Alpha platforms during the latter part of this year. What are the key devices that customers want to see on a mainbo
ard? Power desktop and small-server users usually want to see UltraWide or Ultra2Wide SCSI, as well as Fast Ethernet built in. This not only saves slots but also a couple hundred dollars off the cost of a system.
An affordable integrated audio processor sitting directly on the mainboard's PCI bus and handling Dolby AC-3 five-channel sound with wave table and 3-D surround sound is now a reality, although Sound Blaster compatibility might be a problem without the ISA bus that the original Sound Blaster sits on. Good examples of advanced audio processors for possible mainboard implementation include the CS4610 PCI audio accelerator from Crystal Semiconductor, the Creative EMU-8008, and the SonicVibes from S3.
Graphics will continue to be integrated into mainboards for low-priced systems only, as midrange and high-end users like the flexibility of choosing their graphics cards. But Intel might produce some Pentium II mainboards that have the 440LX chip set and AGP bus and integrate the 740 Auburn AGP
3-D processor (which Intel co-developed with Lockheed Martin's Real3D division) toward year's end at the earliest.
New Chip Sets
Although Intel's chip sets populate most x86 mainboards, other vendors, such as VIA, now have offerings that often surpass Intel's equivalents. In the Pentium market, the old Triton II i430HX chip set was not fully replaced by the new i430TX. While the i430TX offers SDRAM and UltraDMA/33 IDE support, as well as better PC97 compliance with ACPI support, it still lacks the ability to, say, cache the full 512 MB of addressable RAM or support ECC memory.
This is the arena where Cypress, Opti, VIA, VLSI, and other chip-set vendors can compete with Intel. For instance, the VIA Apollo VP2/97, besides offering full support for all AMD, Cyrix, and Intel socket 7 CPUs (including the 6x86MX and K6), handles up to 2 MB of cache at a bus speed of either 66 or 75 MHz; supports SDRAM, Ultra DMA/33, and ECC on all DRAM types, as well as USB; and even integrates a keyboard cont
roller in its two-chip count. It can also cache the whole 512 MB of DRAM-addressable space.
AMD has licensed this chip set to use with the K6 in its 640 chip set. The 640 is also supposed to support the OpenPIC multiprocessing protocol for eventual Dual K5 systems. Later this year, a new version of this chip set is expected, which will support a 100-MHz system bus for the upcoming 300-MHz K6 processor, as well as the AGP graphics bus and the Firewire interface.
On the Pentium Pro/Pentium II level, VIA will offer the Apollo Pro chip set late this year. It will support AGP, dual parallel PCI, and Firewire, as well as the usual PC97 and ECC SDRAM features already present in the existing Apollo P6 chip set. But Intel is still expected to keep the leadership in this arena due to its tight control over the processor and chip-set design of the Pentium II series. In September, Intel is expected to offer the i440LX chip set, which will feature ECC SDRAM, AGP, OnNow, and the Ultra DMA/33. It will support 26
6-, 300-, and 333-MHz single- or dual-Pentium-II systems.
The Deschutes variant of the Pentium II, with a 100-MHz system bus, is slated to appear during the second quarter of 1998. These 350- and 400-MHz processors should use the i440BX chip set and offer enough support for the 100-MHz SDRAM bus and 800-MBps main memory bandwidth, as well as Firewire and Device Bay features. This chip set should be followed by the i450NX server chip set, which will implement a version of the Pentium II that uses the 100-MHz slot 2 with full-speed cache, aimed at servers.
Future Developments
Mainboards will continue to be almost as important to the differentiation of systems as the CPUs that fit in their sockets. Unless Digital wins its current patent-infringement lawsuit and disturbs the production of the Pentium family (and, perhaps even more disruptive, Intel's P7 Merced plans), Intel will continue to dominate this market. But it's likely that more U.S. and Taiwanese mainboard makers will support the in
creasingly successful new-generation AMD and Cyrix devices and related chip sets.
The dual-21264 Alpha mainboard design, described in the sidebar "RISC-Based Mainboard Advancements", shows what will most likely also appear in top-end PC mainboards two years from now: ultrafast crossbar-switch-based main memory paths, very high external bus frequencies, and multiple high-speed I/O buses operating in parallel, all fitting in the standard form factor. The earliest Intel designs supporting such features could appear in early 1999 with the P68 Willamette next-generation Pentium Pro or, more likely, Merced in late 1999. From that point onward, one can only speculate.
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The Tyan Computer Tahoe 2 ATX board has a clock speed up to 300 MHz using two Intel Pentium II processors.
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The P/I-P65UP8 motherboard from Asustek is a dual-processor design with an unusual feature: the ability to use CPUs that fit into socket 7, socket 8, or slot 1. Its CPU socket is located on a daughtercard.
Nebojsa Novakovic is a freelance writer based in Singapore. You can reach him by sending e-mail to
nova@po.pacific.net.sg
.
New Mainboards
