Designing at Light Speed

As clock speeds increase, designers are having an increasingly difficult time crafting methods to exchange signals reliably between the processor, the chip set, and other components on the system board.

A typical signal on a printed circuit board travels at over 118,000 miles per second -- 64 percent of the speed of light. Although that's fast enough to circle the earth in about 200 milliseconds, the same signal in a 300-MHz system requires a full CPU clock cycle to cross a 12-inch circuit board. Signal timing becomes the overriding concern during bo ard design.

To ensure that signals arrive at their intended location at the right time, board layout must take into consideration trace lengths, component placement, and even the delay in routing the clock trace from the processor edge fingers, through the substrate, and to the processor core.

As bus speeds climb into the UHF RF spectrum, digital design techniques merge with analog, because the copper traces on the circuit board begin to act like wave guides and antennas. Each pulse rings and overshoots, and is subject to cross talk and interference from adjacent signals.

When the processor sends out a signal into an ideal load, the signal voltage ramps up smoothly from its low value to its high value. When the signal is pumped into a real load, specifically a socket, circuit-board trace, and receiving component, the timing changes radically. By the time the signal arrives at the target component, it has been mutated by reflections, cross talk, and propagation effects.

To make a bad situation worse, the Pentium II's GTL+ (Gunning Transceiver Logic) bus uses low-voltage-swing I/O buffers. Although using a lower-voltage swing enables higher signal speeds, it also creates correspondingly tighter noise and timing tolerances than in older PC technologies.

Finally, due to the large number of transistors and high internal clock speeds, the Pentium II generates large average current swings between low and full power states. This can cause the supply voltages on the circuit board to sag below their nominal value. Failure to anticipate these swings during board design can change the signal timing and fatally damage the components.