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ArticlesAdding Up the Cell Tax


October 1997 / Cover Story / Preparing for Gigabit Ethernet / Adding Up the Cell Tax

When asynchronous transfer mode (ATM) switches must convert variable-length packets into fixed-length cells for transport over ATM WANs, there's a price. First, each ATM cell contains a 48-byte payload and a 5-byte header. Thus, 10 percent of the ATM "pipe" is immediately lost to overhead. But it doesn't stop there. If a cell carrying a packet gets dropped, not only must the entire IP packet be retransmitted, the other cells f rom the "broken" packet continue on their way. One router manufacturer, using a reasonable estimate of 31 cells per average packet, estimates that a 1 percent cell loss can translate into a 30 percent packet loss.

Foundry Networks, a G igabit Ethernet start-up, estimates that using a reasonable frame size of 256 bytes, Gigabit Ethernet will provide a latency of 2 microseconds across the network. ATM at 622 Mbps will provide 4 µs of latency. But Gigabit Ethernet's variable-length packets provide 93 percent bandwidth use, while ATM achieves only a 77 percent bandwidth efficiency. Thus, the actual bandwidth required to carry a 2-Mbps video stream is 2.15 Mbps for Gigabit Ethernet and 2.59 Mbps for ATM.

ATM proponents counter that today, only ATM can provide the quality of service that applications such as video streaming need. Also, ATM switch maker Fore Systems notes that adding security to IP packets imposes a 20-byte overhead per packet; if the IP traffic is primarily short packets, that could negate the cell tax in short order, Fore officials note. But if traffic is made up, as it increasingly is on the Internet, of long "bursty" packets, it's unclear just how much this could level the playing field.


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Flexible C++
Matthew Wilson
My approach to software engineering is far more pragmatic than it is theoretical--and no language better exemplifies this than C++.

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